Chisel implementations


Hi there,

I am confused with the two Chisel implementations under vta/apps/tsim_example/hardware/chisel and vta/hardware/chisel.
Q1: what’s the difference between these two? I see the tsim implementation is much simpler.
Q2: I guess vta/hardware/chisel will be the place where TVM hardware backend booms, and targeting ASICs, right?
Q3: If guess in Q2 is right, where can I found docs about how Chisel backend is merged in TVM stack/flow? Since all VTA docs are still about HLS implementation.



There is only one version of VTA in Chisel. As the name suggest, tsim_example is an example of TSIM (cycle accurate simulation) for a really simple accelerator using some components of VTA, i.e. DPI.

This Chisel version is currently passing all microbenchmarks/tests except end-to-end things like ResNet. There is still some work-to-do on this end.


Thanks for your reply, Luis.

As for ‘passing’, are you meaning that when we set ‘tsim’ as the target in vta_config.json, all benchmarks/tests are running on top of vta/hardware/chisel, but real ResNet model is still running on top of TSIM simulator?


When you set TARGET to tsim in vta_config.json file, everything related to VTA will be executing on cycle accurate hardware simulation (Chisel), including the resnet-deploy-example. However, there is still some work to be done (debugging) for ResNet on the Chisel version, because accuracy is not good right now. All the other tests work though.


I see. Thanks a lot for your explanations.