Classify result is also incorrect on ZCU104

Troubleshooting
#1

I tried VTA on ZCU104 board with pynq 2.4 image and built new bitstream. The result is right when running a vector addition in tutorial. But for resnet18_v1, the classify result is also incorrect. @thierry

#2

Are you compiling from HLS or Chisel? The Pynq image for ZCU104 might not have proper coherence support as found on the Pynq-Z1 out of the box causing memory reads/writes to produce erroneous results between layers.

I’ve messaged the Pynq team at Xilinx about it multiple times to fix the image, but they have been unresponsive. One workaround is to utilize non-coherent memory transfer; this may slow down performance but will lead to correct execution.

#3

Hi @thierry,

thanks for the kindly help,

I compiled from HLS . I tried to set kBufferCoherent to false to to force do software cache coherent, but the result is also incorrect. Then I set kAlwaysCache to false to perform noncacheable memory allocation, the program crashed: TVMError: Check failed: code == RPCCode: :kReturn: code=4

#4

Hi, are you still on going?

I am going same problem.

#5

I encountered this problem again, on the pynq Zu development board. If I keep the default setting, the program displays “RPC server: load module”, and then the device gets stuck. If I set kbuffercoherent = false in vta/runtime.cc, I can run vta_ get_ started. Py, but it will give wrong classification results in deploy_classification.py. This bug has been fixed and why it still appears. My environment is: TVM 0.8 FPGA: pynq Zu (zynq ultrascale + xczu5eg-sfvc784-1-i). It is very similar to ultra 96.