How can I debug VTA object file (vadd.o)

Hi,

I want to debug VTA runtime details and check how they call API and run VTA internals.
(BTW, I already know where the driver code is, but I cannot find any examples, sequences or usages)

In my understanding, vta.build() emits a binary object (vadd.o) that has a sequence of driver API.
And it finally will be linked with a shared VTA runtime library (libvta.so) to run.
But, the generated code is binary and I cannot debug those codes.
I think there might be a proper way to see details of “vadd.o” during development.
(e.g. Decompilation of the object file, vadd.o, using llvm)

The following is some possible materials I found, but not solutions.

  1. vta.lower(..., simple_mode=False) could be a possible option,
    but it’s not available for the schedules generated from relay.build().
    I tried it but no success.

  2. vta-torture (?) code illustrates some sequence of instruction memory setup,
    but seems it’s only a part of tests and isn’t fully runnable. (Was quite helpful anyway)

At least, if you could just check whether I missed something, it’d be great.
Thank you in advance.

–OYH

What is it that you want to debug exactly? (1) the generated instructions stream that VTA reads and the micro-kernels that describe dense computation?
Or (2) actually run the VTA runtime through a debugger? I haven’t done this personally but it should be doable if you run the FPGA runtime on the pynq board in GDB.

For (1) you can use the following code to build your operator/model instead of the vta.build(...)

# Build GEMM VTA kernel (set debug flags)
with vta.build_config(debug_flag = 0x6):
    my_gemm = tvm.build(s, [A, B, C], "ext_dev",
                        env.target_host, name="my_gemm")

Also are you looking to debug individual operators from your model? One option is to look at the autotuning tutorial that performs task extraction on a ResNet model: https://docs.tvm.ai/vta/tutorials/autotvm/tune_relay_vta.html#sphx-glr-vta-tutorials-autotvm-tune-relay-vta-py

Finally, are you running this on FPGA or in a simulator (either sim or verilator-basedtsim?)

Thank you for response,
Actually, I’ve been working for porting VTA to other FPGA board. (PCIe-based)
The board has on-board DRAM independent from host and it might need some surgery on memory management logic to use it.
So, before the process, I think I need toy-level C codes to understand the path of VTA execution
The word “debug” might be a bad choice for this question.

By the way, I think I found it at vta/tests/hardware/metal_test/metal_test.cc
And it seems that debug_flag is also helpful for this purpose.

  1. debug_flag. Thank you for useful information.
  2. I’m now using VTA simulator (not tsim) and also PYNQ Z1 board environment.