Test failed when run test_program_rpc.py

When I get started with VTA installation, I met an issue in the second stage of the guide.

When run “python vta/tests/python/pynq/test_program_rpc.py.py” from the host, both pynq board and host machine failed.

Log message on pynq board:
xilinx@pynq:~/tvm$ sudo ./apps/pynq_rpc/start_rpc_server.sh
INFO:RPCServer:bind to
INFO:RPCServer:connection from (‘’, 34938)
[ 665.244560] fpga_manager fpga0: Error while writing image data to FPGA
[ 666.577625] fpga_manager fpga0: Error while writing image data to FPGA
INFO:RPCServer:Finish serving (‘’, 34938)

Log message on host machine:
xxx@ubuntu:~/work/tvm$ python vta/tests/python/pynq/test_program_rpc.py
Traceback (most recent call last):
File "vta/tests/python/pynq/test_program_rpc.py", line 43, in <module>
File "vta/tests/python/pynq/test_program_rpc.py", line 34, in program_rpc_bitstream
program_fpga(remote, path)
File "/home/ckt/work/tvm/vta/python/vta/rpc_client.py", line 56, in program_fpga
File "/home/ckt/work/tvm/python/tvm/_ffi/_ctypes/function.py", line 209, in call
raise get_last_ffi_error()
tvm._ffi.base.TVMError: Traceback (most recent call last):
[bt] (8) /home/xilinx/tvm/build/libtvm_runtime.so(+0x8d09c) [0x7f9ac5409c]
[bt] (7) /home/xilinx/tvm/build/libtvm_runtime.so(tvm::runtime::RPCServerLoop(int)+0xc0) [0x7f9ac53130]
[bt] (6) /home/xilinx/tvm/build/libtvm_runtime.so(tvm::runtime::RPCSession::ServerLoop()+0x104) [0x7f9ac4983c]
[bt] (5) /home/xilinx/tvm/build/libtvm_runtime.so(tvm::runtime::RPCSession::HandleUntilReturnEvent(tvm::runtime::TVMRetValue*, bool, tvm::runtime::PackedFunc const*)+0x1b8) [0x7f9ac49510]
[bt] (4) /home/xilinx/tvm/build/libtvm_runtime.so(tvm::runtime::RPCSession::EventHandler::HandleNextEvent(tvm::runtime::TVMRetValue*, bool, tvm::runtime::PackedFunc const*)+0x584) [0x7f9ac4f8e4]
[bt] (3) /home/xilinx/tvm/build/libtvm_runtime.so(tvm::runtime::RPCSession::EventHandler::HandleRecvPackedSeqArg()+0x14c) [0x7f9ac4ed0c]
[bt] (2) /home/xilinx/tvm/build/libtvm_runtime.so(tvm::runtime::RPCSession::EventHandler::SwitchToState(tvm::runtime::RPCSession::EventHandler::State)+0x320) [0x7f9ac4dc28]
[bt] (1) /home/xilinx/tvm/build/libtvm_runtime.so(tvm::runtime::RPCSession::EventHandler::HandlePackedCall()+0x300) [0x7f9ac476e8]
[bt] (0) /home/xilinx/tvm/build/libtvm_runtime.so(+0x266e0) [0x7f9abed6e0]
File "/home/xilinx/tvm/python/tvm/_ffi/_ctypes/function.py", line 71, in cfun
rv = local_pyfunc(*pyargs)
File "/home/xilinx/tvm/vta/python/vta/exec/rpc_server.py", line 71, in program_fpga
File "/usr/local/lib/python3.6/dist-packages/pynq/pl.py", line 1945, in download
TVMError: Except caught from RPC call: OSError: [Errno 22] Invalid argument
During handling of the above exception, another exception occurred:
OSError: [Errno 22] Invalid argument

Basic information:
Board: ZCU104
Ethernet connection: Connect directly to a computer with static IP
Pynq image version: zcu104_pynq_v2.4
Vivado version: v2018.3

I would greatly appreciate it if somebody kindly give me some suggestions.

I have just the same problem. Have you find a way to solve that?:grinning:

hello !I get a problem as same as yours.Have you find a way to solve it .

I have the same error:

Set variables

—> 24 overlay = Overlay(args.bit) 25 srbm = overlay.srbm 26 xlnk = Xlnk()

/usr/local/lib/python3.6/dist-packages/pynq/overlay.py in init(self, bitfile_name, download, partial, ignore_version) 311 self._ip_map = _IPMap(description) 312 if download: –> 313 self.download() 314 315 self.doc = _build_docstring(self._ip_map._description,

/usr/local/lib/python3.6/dist-packages/pynq/overlay.py in download(self) 350 Clocks.set_pl_clk(i) 351 –> 352 super().download() 353 PL.reset(self.parser) 354

/usr/local/lib/python3.6/dist-packages/pynq/pl.py in download(self) 1603 1604 “”" -> 1605 self._download() 1606 if not self.partial: 1607 self._update_pl()

/usr/local/lib/python3.6/dist-packages/pynq/pl.py in _download(self) 1660 fd.write(‘20’) 1661 with open(self.BS_FPGA_MAN, ‘w’) as fd: -> 1662 fd.write(bin_file) 1663 1664 def convert_bit_to_bin(self):

OSError: [Errno 22] Invalid argument

I am using a Zynq MP Ultrascale+ , TE0820. I have been able to load the design in another FPGA which is not ultrascale+. Can anybody point me in the right direction?

Thank you!