TVM Shanghai Meetup - Nov. 16

Hi, We, Alibaba AliOS( Team, are very pleased to host one TVM Meetup in Shanghai on Nov. 16.

The agenda is here (still be tuning):

10:00 - 10: 10 Opening (Yangqing Jia)


10:10 - 10:40 Talk by @tqchen

10:40 - 11:05 TVM @ AliOS (TVM @ ARM CPU, GPU, Hexagon DSP) @FrozenGene

11:05 - 11:30 Break (We provide cake food, coffee…)

11:30 - 11:55 TVM @ vastaitech (TVM @ NPU) @glli @Qiu1981

11:55 - 12:20 AliNPU (Hanguang 800’s programming model and TVM)

12:20 - 12:45 TVM @ Alibaba PAI (TensorCore AutoGen and Mix Precision) @MinminSun

Lightning Talk:

12:45 - 12:50 TVM @ yearlink (TVM deployment) @dolphintear

12:50 - 12:55 TVM @ Alibaba AI Labs (HIFI4 DSP, ARM CPU, PowerVR GPU)

12:55 - 13:00 TVM @ Linaro (ARM platforms) @JammyZhou

13:00 - 13:05 TVM @ AWS (Deploying GluonCV models using TVM)

13:05 - 13:10 TVM @ Alibaba Chips Tool Team (Caffe frontend @ TVM)

13:10 - 13:15 How VTA can be deployed on Intel FPGA @liangfu

Max Seating capacity: 70. (Sorry…Sold out in just 4 hours…) You should provide the register qr code to enter into the meeting.

This meetup, I try my best to make it cover different aspects. From ARM CPU to NPU, from development to deployment. And special thanks @tqchen’s great support. Wish us enjoy this meetup.


Do we have remote access to the meeting?

Thanks for interest. Currently we don’t have plan for allowing remote access, but we will try to make it happen. If have update, I will reply here.

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This event is cool. There are many guys like me who are interested but cannot attend for various reasons. If streaming / video recording is difficult, will the slides publicly avaliable after the event?


I will ask for permission of authors, if they agree, I will do. However, I will write one summary report of this meeting. Thanks.


I am sorry that I am late. If there is a friend who can’t go .if you can transfer the quota to me. then I’m very grateful to you.

Hi @FrozenGene where could i find my qr code? i forgot the link after register

You could find it in WeChat XiaoChengXu (小程序). If you have trouble, don’t worry, I will help you when you come to hotel.

got it Thx:smiley::smiley::smiley::smiley:

Any videos for this meetup?

currently no plan to record. But we will release the slides with authors’ permission.

Is there any video for this meetup?

Hi @venuswu, I am sorry that we don’t have replay for the meetup. We will release some materials in the coming days. As supplement, you may also refer to a HelloGCC’s report and the follow-up. (To be noted, there are bugs in these two reports :slight_smile: ).


Hi @tqchen, @FrozenGene!

I hope you had a nice meetup last saturday. For other meetups it would be great that you record the talk just like you did in the TVM conference last year. Also I hope you make available some records of the TVM conference as well this year :). Unfortunately, this year I am not going to make it.

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On Nov. 16, we, Alibaba AliOS Team, hosted the TVM Meetup in Shanghai. This meetup is very popular. The attendees come from about ~20 organizations, which includes internet company like Alibaba, Google, AWS, chips company like Intel, ARM, Huawei, application company like Yealink and so on.

The slides are published here (with authors’ permission) :

TVM Shanghai meetup slides

@tqchen @FrozenGene @MinminSun @dolphintear @yidawang @JammyZhou @liangfu


After attended the meeting up this time, I have some questions here. I only play a role as applied engineer for our current job, I would like to know about the future in this area here.

  1. built for bare OS I am interested at that JTAG deploying for bare OS device, but for those device with large dynamic memory, we need a memory initialization program to use those DRAM. From later speech, I know that most of NPU IP would request a huge memory buffer which the static memory can’t offer in both chip layout and cost. Although we have some open source project likes OpenOCD, which offers the supporting for driving some common target device, but in the most of case, it won’t initialize the memory controller.

I want the plan of this sub-project. Does it is designed for those MCU with limitted memory or there would be a stack and heap size limit in its supporting target? Or this sub-project would be designed for those FPGA target with a soft core.

  1. Data excchange between different architecture From speech, I know that it is possible to seperate the OPs into different devices, I wonder whether it is possible that a scheduler would arrange some works to that device which is not sufficient in performance but in idle or free of a hardware(OP) defect.

Then I want to know whether data exchange cost between different architecture would be count as a cost in TVM compiler for the disturbing different operations of a model in different NPU architecture.

And if it does, would it be counted as a runtime feedback during the predict runtime? Because sometimes those devices may share the bus bandwidth with the other devices(likes capture card or camera ISP), the traffic jam may happen.

  1. there is indeed a driver component(memory initializer) that runs on the device. Also OpenOCD is not the only way to drive the device, as long as the driver implements a LowlevelDevice interface, micro tvm will work.

  2. Right now the runtime does not do runtime dispatching yet, which will need a scheduler based module to do so. the cost of bus copy and others can be accounted by running a static planning phase during compilation(note that the plan can get feedback from historical data collected).

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