[VTA] - Bitstream compilation failing timing restraints



I’ve had trouble building the custom bitstream as described in the tutorial: https://docs.tvm.ai/vta/install.html#custom-vta-bitstream-compilation.

I can compile the default configuration of VTA (100 MHz, 7ns), but when I change it to 142 MHz/6ns as per the tutorial, and compile with Vivado 2018.2, the design fails to meet timing requirements.


CRITICAL WARNING: [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations.


Am I doing something wrong, or perhaps the guide is missing something? I’m happy to provide more details if necessary.

Thank you, appreciate the help!

Environment: Vivado 2018.2, Ubuntu 16.04,


I also encountered this problem, how can i fix it



you don’t see this problem with upon config (100MHZ,7ns) right? , why i still get it.