[VTA] Using VTA on a platform withrouth a CPU core

#1

Hi,

I’m new to TVM and want to use VTA on our Intel Stratix10 FPGA. I have some questions regarding that, any feedback would be greatly appreciated.

1- Considering that there is no hard core on our FPGA board, how should we use the runtime? Should we just keep it on the host side/compile machine or we need to find a way to implement the runtime in the HW, say by having a soft core? How feasible it is?

2- I want to take the chisel implementation of VTA and use it for our Intel FPGA, I’m just wondering if anyone else has already tested it on Intel FPGAs? How stable is the code?

@thierry @liangfu

Thank you

#2

  1. I think it would be much easier to keep it on the host side, since having a soft core to boot Linux seems infeasible for getting started to evaluate the VTA hardware design.

  2. I have successfully evaluated the VTA design on DE10-Nano, which is based on Cyclone V. @pasquale also had a few fixes in bringing robust de10nano support. See https://github.com/apache/incubator-tvm/pull/4986

Hope this helps.

1 Like
#3

Thank you so much liangfu.

  1. Hope we see the end-to-end support for PCIe based FPGAs in TVM repo soon.

2.That is great that you tested it on a fpga board, previously it was just tested with simulator.

#4

One relevant question, is there any attempt going on to support FPGA targets with a soft core (e.g., Nios and Microblaze)? These are capable of running linux/embedded linux, so no prblem from this perspective. @liangfu @thierry
Thanks

#5

Not that I’m aware of, but it would be very good to see contributions in that direction.

In addition seeing a RISC-V core instead of Nios or Microblaze would be very cool to see since it’s mostly vendor independent.

#7

Thank you @thierry for always being responsive and helpful to questions.

Considering that there is Nios II/RISCV llvm backend, What are the steps we need to take to add the tvm support? @liangfu